Field of the Invention
The present invention relates to a method for creating a device, such as an electronic device and a micro-electro-mechanical system (MEMS) device, with a through wiring line.
Description of the Related Art
Faster high-performance systems of integrated circuits, typified by LSIs, are required. To achieve faster higher-performance systems of integrated circuits, chip mount technology using a three-dimensional structure is required. For this purpose, a through wiring line capable of electrically connecting chips in the shortest distance is used. In this case, the through wiring line and other electrical wiring lines need an insulating film having sufficient insulating properties between the lines and the substrate. In particular, an electronic device that needs high drive voltage or output voltage needs to have high insulation performance among the electrodes, the wiring lines, and the substrate.
Some electronic devices need a thin substrate to meet performance requirements. For example, for ultrasonic transducers, a desired thickness of the substrate is smaller or equal to half the wavelength of ultrasonic waves to reduce the influence of reflection from the substrate on device performance. In an example, the substrate, if made of silicon, of an ultrasonic transducer with a frequency of about 20 KHz on a higher frequency side has, preferably, thickness of about 250 μm or less. To create an electronic device with a thin substrate, there are a technique using a thin substrate with a desired thickness from the beginning of the creating process and a technique using a substrate thicker than a desired thickness at the beginning of the creating process.
The former method needs to obtain necessary mechanical strength by bonding the thin substrate to a support substrate to prevent the substrate from being deformed or broken during creation. The need for the support substrate increases as the diameter of the thin substrate for use in creation increases. In this case, the creating process can be significantly limited according to the method of bonding the thin substrate and the support substrate. For example, when the thin substrate and the support substrate are bonded together using an adhesive, usable chemicals and the maximum temperature for the creating process are limited according to the resistance of the adhesive to the chemicals and temperature. In the latter method, the first half of the creating process is performed using a thick substrate, but the substrate is decreased to a desired thickness during the latter half, of the creating process. In this case, the first half of the creating process has high flexibility.
Japanese Patent Laid-Open No. 2012-195514 discloses a technique for performing the first half of the creating process using a substrate with a thickness larger than a desired thickness and decreasing the thickness of the substrate to a desired thickness during the latter half of the creating process. In this technique, interstitial via holes are formed in a base substrate, an insulating film is formed on the inner walls of the via holes, and then an element unit is formed. After the base substrate is decreased in thickness, and an insulating film is formed on the ground surface of the thinned substrate, a through wiring line is formed. In this case, since the insulating film is formed on the inner walls of the via holes before the element unit is formed, the insulating film can be formed at a sufficiently high temperature (for example, 800° C. or higher). This allows an insulating film having high dielectric strength to be formed on the inner walls of the via holes. This is because a higher-quality insulating film can be formed by high-temperature deposition than that by low-temperature deposition. It is known that, for example, a silicon thermal oxide film formed by thermal oxidation at 800° C. or higher has higher denseness, higher uniformity in thickness, and higher dielectric strength than a silicon oxide film formed by Chemical Vapor Deposition (CVD) at 400° C. or less.
However, the method disclosed in Japanese Patent Laid-Open No. 2012-195514 needs to remove an insulating film on the back of the substrate after elements are formed and to form an insulating film again to form a thin substrate. The insulating film to be formed on the back of the substrate again is formed, preferably, at 400° C. or less, to prevent damage to the element unit on the substrate. This can cause the dielectric strength of the insulating film on the back of the substrate to be insufficient for the device that needs high voltage.